Here are a few common questions we get asked about specifically about our Analog/Digital Rails platform. Perhaps this will answer a few of yours...
A: We are wholly located in Tempe, Arizona (USA)
A: Analog Rails is a complete AUTOMATED MIXED-SIGNAL EDA platform that allows the senior circuit designer to be a "One Stop Shop". NO CAD NOR LAYOUT DESIGNERS NEEDED. Even design management into all popular revision control systems is included. It combines automation (front to back), correct by construction manual editing, and verification that allows mixed signal designs to be designed from scratch or migrated in minutes rather than months. We are native on Open Access database.
A: We did not know that, so we did it.
A: No. We are an upstart company. (And We've Been At It for 20 years)
A: No. Circuit designers should do their own layouts. Automation of layout structures and routes allow simulation with all parasitics at all times. The circuit designers create better layouts by utilizing black space and making tradeoffs that the layout designer cannot make. Automation enables "what if" scenarios. Our automatic router is DRC/LVS correct and ELECTRICALLY AWARE. The layout designer has no chance against our automation coupled with the circuit designer.
A: None. Analog Rails is a complete flow that includes design/data management and PDKs.
A: We expanded. We have UVM, digital place and route with the touch of a button all within the Analog Rails design environment. Just like in analog mode, full cross probing and synchronization with the schematic is maintained. We have our own built-in standard cell library with liberty and verilog files. We also have our own static timing tools that includes RCx to unit time delays for all datapaths.
A: Far more accurate than the 25-year-old tool that you're probably using. The proper STI layout effects will be netlisted out AT ALL TIMES based on abutment, well distances, diffusion group distances, etc. Our schematic and layout are synchronized. We know that the real values are.
A: Press "=" and the pair of devices to interdigitize. Simple. These common centroid differential structures with a symmetrical guard ring and gate protection diodes are automatically generated. The differential router creates a shielded wall.
A: Hearing the complaints that Analog Rails has taken the “creativity away from the analog circuit designer”, advanced customization features have been added for engineers who get paid by the hour, or the religious engineer who really believes that only they have mastered true symmetry.
A: Tag nets as "RF", to leave plenty of space in the route. We minimize Cdg (miller capacitance) and Cds with optimizers
A: For EM: User selects "%". All route segments and vias exceeding that show up in layout. For R, I, and V: Just select 2 points in the layout.
A: For simulation accuracy. At feature sizes below 130n, SA and SB have a large effect. The bogus pre-layout calculations that are provided in cdf callbacks are no longer going to cut it. There is no reason for the circuit designer to wait several days/weeks for the layout to get done to get the parasitics.
A: You should only use it to force the autorouter, such as for matching or miller capacitance awareness. It is correct by construction and won't allow a DRC nor a short circuit.
A: Correct by Construction™. DRC/LVS correct. Minimizes capacitance. User setable RF, differential, shielded nets, power mesh, differential and signal aware density fill, automatic well tap connection, automatic gate protection diodes and antenna rules, double via option. Differential routes shielded. Single-ended shielded routing option (set in schematic). Maximum wire length and area per layer. We currently handle the design rules down to 12nm.
A: No. The simulation environment was built with the optimizer in mind. Place the predefined or custom measurements into the schematic, use our testbench templates or build your own, then launch. Optimizer over all corners and all analysis at the same time. We have 2 global and 2 local optimizers. User can force minimum Vds-Vdsat, Vod, etc.
A: Because our automation is of good quality.
A: We read/write based on the same database (Open Access), so you can use both platforms at the same time. We also produce extracted views to allow the user to verify from anywhere. Then again, we don't see a reason to stick with your archaic flow. Analog Rails can replace Virtuoso + all of your surrounding infrastructure.
A: No. The electron existed several years before Cadence was formed, so they were unable to patent it. As far as trusting Cadence, most of you don't. Most companies use Mentor's Calibre for DRC & LVS. There are a ton of foundry approved simulators. We support most of them.
A: Initially, we used "Analog on Rails", but we dropped the "on". The "Rails" represents a framework to create integrated circuits quickly. No steering needed. We know the direction you want to go in.
A: No. A bulldozer is more expensive than a shovel.